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<4>%s: PCS reset bit would not clear [%08x].
<6>%s: Link up at %d Mbps, %s-duplex.
<6>%s: Pause is enabled (rxfifo: %d off: %d on: %d)
<3>%s: enabling mac failed [tx:%08x:%08x].
<3>%s: enabling mac failed [%s:%08x:%08x].
<3>%s: transmit timed out, resetting
<3>%s: TX_STATE[%08x:%08x:%08x] FIFO[%08x:%08x:%08x] SM1[%08x] SM2[%08x]
<3>%s: RX_STATE[%08x:%08x:%08x]
<3>%s: HP_STATE[%08x:%08x:%08x:%08x]
<6>%s: Got link after fallback, retrying autoneg once...
<6>%s: Autoneg failed again, keeping forced mode
<6>%s: link configuration changed
/builddir/build/BUILD/kernel-2.6.32-504.3.3.el6/linux-2.6.32-504.3.3.el6.i686/arch/x86/include/asm/dma-mapping.h Cannot enable PCI device, aborting.
Cannot find proper PCI device base address, aborting.
Etherdev alloc failed, aborting.
Cannot obtain PCI resources, aborting.
<4>cassini: Could not enable MWI for %s
Could not set PCI cache line size
Unable to obtain 64-bit DMA for consistent allocations
No usable DMA configuration, aborting.
Cannot map device registers, aborting.
cassini: MTU limited to %d bytes
cassini: MAC address not found in ROM VPD
<3>cassini: MII phy did not respond [%08x]
<3>cassini: Failed to load firmware "%s"
<3>cassini: bogus length %zu in "%s"
Cannot allocate init block, aborting.
Cannot register net device, aborting.
<6>%s: Sun Cassini%s (%sbit/%sMHz PCI/%s) Ethernet[%d] %pM
<3>cassini: %s: BUG! Tx Ring full when queue awake!
<7>%s: tx[%d] queued, slot %d, skblen %d, avail %d
<3>%s: no spare buffers available.
<7>%s: rxd[%d] interrupt, done: %d
<7>%s: tx err: MAC_STATE[%08x]
<7>%s: tx err: TX_FIFO[%08x:%08x:%08x]
<3>%s: failed to request irq !
<7>%s: tx interrupt, status: 0x%x, %llx
<7>%s: rx[%d] interrupt, done: %d/%d
<6>%s: Memory squeeze, deferring packet.
<7>%s: corrupt rx tag framing
<7>%s: length mismatch for rx frame
<7>%s: txmac interrupt, txmac_stat: 0x%x
<3>%s: TX MAC max packet size error.
<7>%s: rxmac interrupt, stat: 0x%x
<7>%s: mac interrupt, stat: 0x%x
<No ACK64# during ABS64 cycle> <Delayed transaction timeout> <3>%s: Read PCI cfg space status [%04x]
<3>%s: PCI parity error detected.
<3>%s: PCI master acks target abort.
<3>%s: PCI system error SERR#.
<3>%s:reset called in cas_abnormal_irq [0x%x]
<7>%s: rxc[%d] interrupt, done: %d/%d
full half <6>%s: TX pause enabled
<6>%s: Pause is disabled
rx tx,rx <3>%s: sw reset failed.
%s: hrm.. hw not running!
<3>%s: MIF_STATE[%08x]
<3>%s: MAC_STATE[%08x]
<6>%s: PCS RemoteFault
<6>%s: PCS link down.
<6>%s: Link down
cassini 1.6 <6>%s &cp->pm_mutex local-mac-address phy-type pcs phy-interface <3>cassini: "%s" Failed %d
Cu Fi 33 66 64 32 + sun/cassini.bin <6>%s: resuming
<7>%s: tx[%d] done, slot %d
<7>%s: rx page overflow: %d
<3>%s: TX MAC xmit underrun.
<3>%s: PCI error [%04x:%04x] <other> <BIM DMA 0 write req> <BIM DMA 0 read req>
<3>%s: PCI target abort.
<3>%s: PCI master abort.
<3>%s: PCI parity error.
packet arrival? VLAN? CFI? 8023? LLC? LLCc? IPV4? IPV4 cont? IPV4 frag? TCP44? IPV6? IPV6 len IPV6 cont? TCP64? TCP seq TCP control flags TCP length TCP length cont Cleanup Cleanup 2 { } } i
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