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CTRL_LO5: 0x%x Tuning for Band: %hd (%d kHz) REFDIV: %hd, FREF: %d FBDIV: %d, Rest: %d Num: %hd, Den: %hd, SD: %hd HFDIV code: %hd VCO = %hd VCOF: ((%hd*%d) << 1)) Revision: %x vga filter register is set to %x CAPTRIM=%hd; ADC = %hd (ADC) & %dmV CAPTRIM=%hd is closer to target (%hd/%hd) Error: this driver is not to be used meant for P1D or earlier Gain: %d, WBDOffset (3.3V) = %hd <6>DiB0070: successfully identified
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+ n^ dib0070.c dib0070_wakeup dib0070_sleep dib0070_get_frequency dib0070_release dib0070_read_reg dib0070_write_reg debug dib0070_set_ctrl_lo5.clone.0 dib0070_tune dib0070_lna dib0070s_tuning_table dib0070_lna_flip_chip dib0070_tuning_table dib0070_p1f_defaults __mod_license737 __mod_description736 __mod_author735 __ksymtab_dib0070_attach __kstrtab_dib0070_attach __kcrctab_dib0070_attach __ksymtab_dib0070_wbd_offset __kstrtab_dib0070_wbd_offset __kcrctab_dib0070_wbd_offset __ksymtab_dib0070_set_rf_output __kstrtab_dib0070_set_rf_output __kcrctab_dib0070_set_rf_output __ksymtab_dib0070_get_rf_output __kstrtab_dib0070_get_rf_output __kcrctab_dib0070_get_rf_output __ksymtab_dib0070_ctrl_agc_filter __kstrtab_dib0070_ctrl_agc_filter __kcrctab_dib0070_ctrl_agc_filter __mod_debug38 __mod_debugtype37 __param_debug __param_str_debug dib0070.mod.c _rheldata __mod_srcversion33 __module_depends ____versions __mod_vermagic5 dib0070_ctrl_agc_filter __this_module __crc_dib0070_ctrl_agc_filter kfree kmem_cache_alloc_trace dib0070_set_rf_output __crc_dib0070_get_rf_output __crc_dib0070_wbd_offset __crc_dib0070_set_rf_output printk dib0070_wbd_offset param_set_int dib0070_get_rf_output i2c_transfer dib0070_attach malloc_sizes __crc_dib0070_attach param_get_int msleep dib0070.ko.debug @ .rodata.str1.1 .rodata.str1.4 .data .rheldata .rodata .rel__kcrctab .symtab .rel__ksymtab .strtab .shstrtab .note.gnu.build-id .gnu.linkonce.this_module .note.module.sig .gnu_debuglink .rel__param .modinfo __ksymtab_strings __versions .bss .rel.text m 4 $ ` L / 2 2 b Q ( M , P ; | 7 (
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